1. Field of the Invention
The present invention relates to a laminate type electronic component and a method for manufacturing the laminate type electronic component, and more particularly, relates to a laminate type electronic component with an external electrode formed directly by plating in such a way that the external electrode is at least partially connected electrically to a plurality of internal electrodes, and a method for manufacturing the laminate type electronic component.
2. Description of the Related Art
Laminate type electronic components typified by laminated ceramic capacitors are, in general, provided with a component main body which has a stacked structure including, for example, a plurality of stacked functional material layers composed of a dielectric ceramic, and a plurality of layered internal electrodes formed along the interfaces between the functional material layers. The respective ends of the plurality of internal electrodes are exposed at each of two end surfaces of the component main body, and external electrodes are formed so as to electrically connect the respective ends of the internal electrodes to each other.
For the formation of the external electrodes, typically, a conductive paste including a metal constituent and a glass constituent is applied onto the end surfaces of the component main body, and then subjected to firing, thereby forming paste electrode layers first. The paste electrode layers serve to electrically connect the internal electrodes to each other. Next, a first plating layer containing, for example, nickel as its main constituent is formed on the paste electrode layers, and a second plating layer containing, for example, tin or gold as its main constituent is further formed thereon. The second plating layer is intended to ensure solderability, whereas the first plating layer serves to prevent solder erosion in the case of a solder joint.
As described above, the external electrode is typically composed of the three-layer structure of the paste electrode layer, the first plating layer, and the second plating layer.
However, the paste electrode layer has a large thickness of several tens μm to several hundreds of μm. Therefore, in order to limit the dimensions of the laminate type electronic component up to certain specifications, there is undesirably a need to reduce the effective volume for ensuring a capacitance, because there is a need to ensure the volume for the paste electrode layers. On the other hand, the plating layers each have a thickness on the order of several μm. Thus, if the external electrodes can be composed only of plating layers, a larger effective volume can be ensured for ensuring the capacitance.
For example, Japanese Patent Application Laid-Open No. 63-104314 discloses a method in which a metal thin film formed by an electroless plating method is used as an external electrode. More specifically, Japanese Patent Application Laid-Open No. 63-104314 discloses a process of subjecting the entire surface of a component main body to an activation treatment, then carrying out electroless plating to form a metal thin film on the entire surface of the component main body, and then carrying out masking-etching to remove an unnecessary section of the metal thin film and using the left section thereof as external electrodes.
According to the method disclosed in Japanese Patent Application Laid-Open No. 63-104314, the metal thin film may be tentatively formed on the entire surface of the component main body, and thus, the process from the activation treatment to the electroless plating can be carried out by a batch treatment (for example, a barrel plating method) which can efficiently treat a large number of chips of component main bodies. Therefore, in this regard, the method disclosed in Japanese Patent Application Laid-Open No. 63-104314 can be considered advantageous in terms of productivity and cost.
On the other hand, in the method disclosed in Japanese Patent Application Laid-Open No. 63-104314, the metal thin film is formed on the entire surface of the component main body as a result of the electroless plating, and thus, it is then necessary to remove an unnecessary section of the metal thin film. However, it is not possible to adopt the batch treatment simply in the masking-etching process to remove a specific section of the metal thin film. More specifically, this is because there is a need for steps such as aligning and retaining component main bodies to be subjected to masking-etching, and providing an etching resist to specific sections of the aligned and retained component main bodies, which are not able to be handled by the batch treatment. Accordingly, after all, the method disclosed in Japanese Patent Application Laid-Open No. 63-104314 will not be able to enjoy the advantages of the batch treatment, such as the ability to efficiently treat a large number of chips of component main bodies.